1. Field of the Invention
This invention relates to a method and apparatus for scheduling in a multicore architecture.
2. Description of the Related Art
In recent years, there has been a trend towards producing processors containing multiple cores, in order to maximize silicon efficiency (i.e. “application-available” MIPs/mm2 or MIPs/mW). Such multicore architectures are ideally suited to running applications based on threads, because a thread defines an autonomous package of work containing an execution state, instruction stream and dataset, which may execute concurrently with other threads.
Scheduling is the general term for the discovery and allocation of the most suitable thread (e.g., set of instructions) for execution to particular processing resources, which is required by both the application program and the underlying hardware platform upon which it is being executed.
Accordingly, the concurrency of execution within a multicore architecture, combined with the possible availability of multiple cores suitable for executing a particular thread, introduces additional problems into the scheduling used to allocate threads within these multicore architectures.